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    Please use this identifier to cite or link to this item: http://ir.nknu.edu.tw/ir/handle/987654321/22008


    題名: Ultra-Low-Voltage Phase-Locked Loop with Bulk-Input VCO
    Authors: Yu-Lung Lo;Wei-Bin Yang;Ting-Sheng Chao;Jiunn-Way Miaw;Jing-Shiuan Huang;Kuo-Hsing Cheng
    羅有龍
    Date: 2008-08
    Issue Date: 2014-11-12 16:25:09 (UTC+8)
    關聯: Proc. of the 19th VLSI Design/CAD Symposium, Pingdong, Taiwan, Aug. 2008
    Appears in Collections:[電子系] 羅有龍
    [電子工程學系] 會議論文

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