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    Please use this identifier to cite or link to this item: http://ir.nknu.edu.tw/ir/handle/987654321/21978

    題名: Vernier Caliper and Equivalent-Signal Sampling for Built-in Jitter Measurement System
    Authors: Shu-Yu Jiang;Chan-Wei Huang;Yu-Lung Lo;Kuo-Hsing Cheng
    Date: 2009-02
    Issue Date: 2014-11-11 16:24:19 (UTC+8)
    關聯: IEICE Trans. on Fundamentals of Electronics, Communications and Computer Sciences, vol.E92-A, pp. 389-400, Feb. 2009. (SCI&EI)
    Appears in Collections:[電子工程學系] 期刊論文
    [電子系] 羅有龍

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