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    Please use this identifier to cite or link to this item: http://ir.nknu.edu.tw/ir/handle/987654321/21966


    題名: A 50ns Verify Speed in Resistive Random Access Memory by Using a Write Resistance Tracking Circuit
    Authors: Yu-Lung Lo;Pin-Tseng Chen;Chia-Chen Chan;Han-Ying Liu
    羅有龍
    Keywords: Resistive RAM (RRAM);verify;write resistance tracking circuit
    Date: 2012-06-01
    Issue Date: 2014-11-11 16:24:08 (UTC+8)
    Abstract: This paper proposes a write resistance tracking circuit (WRTC) to improve the memory window of HfOx-based resistive memory. With a 50-ns single voltage pulse, the minimal resistance of the high resistance state in the 1-kb array of resistive switching elements can increase from 25 kΩ to 65 kΩ by using the proposed verify circuit. The WRTC uses the transition current detection method based on the feedback of the memory cell to control the write driver. The WRTC achieves distinct bistable resistance states, avoids the occurrence of over-RESET, and enhances the memory window of the RRAM cell.
    關聯: IEICE Trans. on Electronics, vol.E95-C, pp. 1128-1131, Jun. 2012. (SCI&EI)
    Appears in Collections:[電子工程學系] 期刊論文
    [電子系] 羅有龍

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