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    Items for Author "Wei-Bin Yang" 

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    Showing 17 items.

    Collection Date 題名 Authors Bitstream
    [電子工程學系] 會議論文 2013-08 A High-Linearity All-Digital Temperature Sensor With Ring Oscillator Yu-Lung Lo; Yu-Ting Chiu; Wei-Bin Yang; Chao-Chang Chiu; Yu-Lung Lo; 羅有龍
    [電子工程學系] 會議論文 2013-04 A GHz Full-Division-Range Programmable Divider with Output Duty-Cycle Improved Yu-Lung Lo; Jhih-WeiTsai; Han-Ying Liu; Wei-Bin Yang; 羅有龍
    [電子工程學系] 會議論文 2011-12 An All-Digital DLL with Dual-Loop Control for Multiphase Clock Generator Yu-Lung Lo; Pei-Yuan Chou; Hsiang-Hui Cheng; Shu-Fen Tsai; Wei-Bin Yang; 羅有龍
    [電子工程學系] 會議論文 2011-12 Supply Voltage and Temperature Insensitive Current Reference for the 4 MHz Oscillator Chi-Hsiung Wang; Cheng-Feng Lin; Wei-Bin Yang; Yu-Lung Lo; 羅有龍
    [電子工程學系] 會議論文 2011-12 Temperature Insensitive Current Reference for the 6.27 MHz Oscillator Ching-Tsan Cheng; Zheng-Yi Huang; Wei-Bin Yang; Yu-Lung Lo; 羅有龍
    [電子工程學系] 會議論文 2010-11 A New Dynamic Fast-Settling Low Dropout Regulator with Programmable Output Voltage Hsiang-Hsiung Chang; Jsung-Mo Shen; Wei-Bin Yang; Yu-Lung Lo; 羅有龍
    [電子工程學系] 會議論文 2009-12 A Low Power Multi-Voltage Control Technique with Fast-Settling Mechanism for Low Dropout Regulator Jsung-Mo Shen; Wei-Bin Yang; Chang-Yu Hsieh; Yu-Lung Lo; 羅有龍
    [電子工程學系] 會議論文 2009-09 Designing Ultra-Low Voltage PLL Using a Bulk-Driven Technique Ting-Sheng Chao; Yu-Lung Lo; Wei-Bin Yang; Kuo-Hsing Cheng; 羅有龍
    [電子工程學系] 會議論文 2009-08 A Multi-Voltage Control Technique with Fast-Settling Mechanism for Low Dropout Regulator Jsung-Mo Shen; Wei-Bin Yang; Chang-Yu Hsieh; Yu-Lung Lo; 羅有龍
    [電子工程學系] 會議論文 2008-08 Ultra-Low-Voltage Phase-Locked Loop with Bulk-Input VCO Yu-Lung Lo; Wei-Bin Yang; Ting-Sheng Chao; Jiunn-Way Miaw; Jing-Shiuan Huang; Kuo-Hsing Cheng; 羅有龍
    [電子工程學系] 會議論文 2008-04 Spread-Spectrum Clock Generator Using Fractional–N PLL Controlled Delta-Sigma Modulator for Serial-ATA III Kuo-Hsing Cheng; Cheng-Laing Hung; Chih-Hsien Chang; Yu-Lung Lo; Wei-Bin Yang; Jiunn-Way Miaw; 羅有龍
    [電子工程學系] 會議論文 2006-12 A New Dynamic Floating Input D Flip-Flop (DFIDFF) for High Speed and Ultra Low Voltage Divided-by 4/5 Prescaler Ting-Sheng Jau; Wei-Bin Yang; Yu-Lung Lo; 羅有龍
    [電子工程學系] 會議論文 2002-07 A Novel Power-On Reset Circuit Without Capacitor Kuo-Hsing Cheng; Yu-Lung Lo; Wei-Bin Yang; 羅有龍
    [電子工程學系] 期刊論文 2011-06 The High-Performance and Low-Power CMOS Output Driver Design Ching-Tsan Chen; Chi-Hsiung Wang; Pei-Hsuan Liao; Wei-Bin Yang; Yu-Lung Lo; 羅有龍
    [電子工程學系] 期刊論文 2010-03 A Pseudo Fractional-N Clock Generator with 50% Duty Cycle Output Wei-Bin Yang; Yu-Lung Lo; Ting-Sheng Chao; 羅有龍
    [電子工程學系] 期刊論文 2009-06 High-Speed and Ultra-Low-Voltage Divide-by-4/5 Counter for Frequency Synthesizer Yu-Lung Lo; Wei-Bin Yang; Ting-Sheng Chao; Kuo-Hsing Cheng; 羅有龍
    [電子工程學系] 期刊論文 2009-05 Designing an Ultralow-Voltage Phase-Locked Loop Using a Bulk-Driven Technique Yu-Lung Lo; Wei-Bin Yang; Ting-Sheng Chao; Kuo-Hsing Cheng; 羅有龍

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