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    Please use this identifier to cite or link to this item: http://ir.nknu.edu.tw/ir/handle/987654321/25649


    題名: 非平面結構金氧半場效電晶體閘極絕緣層可靠度之分析與探討
    Analysis and Study on Gate Dielectric Reliabilities of Non-Planner MOSFETs
    Authors: 楊宜霖
    貢獻者: 國立高雄師範大學電子工程學系(所)
    Date: 2014-08
    Issue Date: 2016-01-20 14:27:58 (UTC+8)
    Abstract: 本計畫為個別型一?期計畫。在本計畫中,我們將專注於鰭式電晶體(FinFETs)之閘
    極介電層缺陷之?測分析與探討,並跟據?測結果,建?一套在?同應?偏壓下之介電
    層缺陷模型。
    本計畫在製程方面,我們將與國內半導體大廠合作,對其所製備之FinFETs 元件進
    ?介電層缺陷?測分析。我們主要將結合隨機電報雜訊及低頻雜訊(1/f noise)分析的方
    式,?測?同摻雜濃?之元件氧化層內原始之缺陷分佈,接著再?用(1)TDDB (Time
    Dependent Dielectric Breakdown)、(2) P
    This is a one year project for individual applicator. In this project, we will focus on the
    defect distribution in gate dielectric of FinFETs under different stress techniques. According
    to the results of measurement, we will establish the defect model in
    商品化, 研究期間 10308~10407, 研究經費545千元
    關聯: 科技部計畫編號 MOST103-2221-E017-014
    Appears in Collections:[電子系] 楊宜霖
    [電子工程學系] 研究計畫

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