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    題名: 電阻式記憶體之低能耗製程技術開發(I)
    Development of Low Power Consumption Fabrication Technology for Resistive Random Access Memory
    Authors: 楊宜霖
    貢獻者: 國立高雄師範大學電子工程學系
    Keywords: 陽極氧化;電磁波熱氧化;電阻式記憶體
    Date: 2011-08
    Issue Date: 2011-11-25 11:45:32 (UTC+8)
    Abstract: 研究期間 10008~ 10107, 研究經費 456 千元
    本計畫為個別型兩年期計畫。在本計畫中,本人將首次整合純水中陽極氧化補償技術與以高介電常數材料製做電荷儲存式快閃記憶體元件,完成以低成本低能耗的方式,其中包含(1)低溫陽極氧化(Anodic oxidation)技術及(2)電磁波高溫熱氧化 (Electromagnetic Thermal Oxidation)技術,來製備新型態非揮發性電阻式記憶體 (Novel Non-volatile Resistive Random Access Memory, RRAM)。本計畫第一年首先將研究以陽極氧化及電磁波熱氧化的方式,將鍍在鉑(Pt)底電極上的過渡金屬氧化,並從各種不同的過渡金屬氧化物中,經由高低電阻率的切換特性,選擇出最適合用來做為電阻式記憶體介電層的金屬氧化物及其氧化條件。接著第二年我們會再做更進一步電性及材料上的量測分析:其中包含改變Pulse width 量測IV、變溫量測,來觀察電荷trapping 與de-trapping 的機制;利用IETS(Inelastic Electron Tunneling Spectroscopy)來分析氧化層內部的缺陷機制;以及利用TEM, XPS 等材料分析方式來對氧化層做薄膜材料成份及鍵結分析。再由以上的分析中研究其高電阻與低電阻之間的切換機制。因為電阻式記憶體可以相容於傳統CMOS 製程,若能成功,將成為下一世代非揮發性記憶體發展的主要方向,且此計畫所提出之製程技術更具有製程簡單、低成本及低能耗等優勢,不僅可增加台灣在電阻式記憶體的研究能量,更符合現今節能減碳趨勢之綠能元件,對於節能減碳有實質之貢獻,也可大幅提升台灣記憶體之研究。
    This project is for individual applicators and will last for two years. In this work, based on experiences of the compensation technique of ultra-thin oxide in DI water using anodic oxidation and the charge trapping flash memory fabrication using high-k dielectrics, I proposes a method of low cost and low energy consumption to fabricate novel non-volatile resistive random access memory (RRAM) the first time, which containing: (1) anodic oxidation technique at low temperature, and (2) electromagnetic thermal oxidation technique. In the first year, this project will try to oxidize different kinds of transition metal candidates pre-deposited on Pt bottom electrodes using anodic and electromagnetic oxidation method, among which, best metal oxides and oxidation conditions for RRAM usage will be selected according to its high/low resistance switching characteristics. In the second year, further electrical properties and characteristics will be investigated, which including using current-voltage (I-V) measurement as changing pulse width at different temperatures to characterize trapping and de-trapping mechanisms, using IETS to extract the characteristics of defects in the dielectrics, and material analysis such as TEM and XPS to indicate the chemical bonding of the materials. Meanwhile, the mechanisms of switching between high and low resistances will be studied based on these analysis results. Due to the compatibility with traditional CMOS process, RRAM will become one of the most attractive candidates for next generation non-volatile memories. The fabrication technology proposed in this project has the advantages of process simplicity, low cost and low energy consumption, which not only will make the research about RRAM more powerful in Taiwan, but also will correspond to the trend of green energy devices and carbon reduction nowadays.
    關聯: 行政院國家科學委員會計畫 / 計畫編號 NSC100-2221-E017-002
    Appears in Collections:[電子工程學系] 研究計畫
    [電子系] 楊宜霖

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